Intel provided new information about the upcoming Xeon server processors codenamed Sapphire Rapids during the Supercomputing (SC) 21 event. Core architecture is one of the most important improvements in the new generation. These CPUs to be used in the server space use the same Golden Cove cores found in Alder Lake processors offered to consumers.
The only difference between the 12th gen Alder Lake and the Golden Cove variant found in Sapphire Rapids comes in the amount of L2 (level two) cache. With Alder Lake, Intel adds 1.25MB of L2 cache to each core, while Sapphire Rapids allocates 2MB of capacity to each core.
Sapphire Rapids will come with Golden Cove architecture based on Intel 7 process. Additionally, the chips will support Intel Advanced Matrix eXtensions (AMX) to boost performance in training and inference workloads.
One of the features verified by Intel is the inclusion of High-Bandwidth Memory (HBM) memory in the processors. These processors work with eight memory channels in DDR5 standard and also offer PCIe Gen5 benefits. Intel has confirmed that Sapphire Rapids Xeon will feature up to 64GB of HBM2E memory, including several operating modes.
The first is described as a simple HBM cache mode, where the HBM memory acts as a buffer for the installed DDR5. This method is transparent to the software and provides easy use. The second method is Flat Mode: this means that both DDR5 and HBM are used as contiguous address spaces. Finally, there’s an HBM mode that uses HBM2E modules as the only system memory and applications fit into it.
Intel opted for HBM2e for Sapphire Rapids, while AMD decided to increase L3 capacity by using hybrid bonding technology to provide up to 768MB of L3 cache per chip. Sapphire Rapids will also compete with AMD’s upcoming Zen 4 96-core Genoa and 128-core Bergamo chips, both of which are based on TSMC’s 5nm process.
HBM Memory Benchmark
|HBM2 / HBM2E||HBM||HBM3 (Coming soon)|
|Max Pin Transfer Speed||3. 2Gbps||1Gbps||3. 1Gbps|