AMD is investing heavily in stacked cache and chip technologies for next-generation CPU and GPU designs. According to a new rumor from a known leaker Greymon55, the red team will bring 3D Cache (3D V-Cache) design to the screen in the form of 3D Infinity Cache after EPYC and Ryzen.

If you remember, AMD introduced the Infinity Cache technology, which is a high-bandwidth in-die cache that the GPU can access quickly, together with the RDNA 2 architecture. Existing cache designs can scale up to 128 MB capacity and 2 TB/s bandwidth.

It is said that the Infinity Cache capacity will be doubled with 256 MB in the new generation Navi 33 GPUs, while the high-end Navi 31 will use Infinity Cache cache up to 512 MB.

The cache on the Navi 31 GPUs will be split between the two chips due to the multi-chip design (MCM), resulting in 256 MB of capacity per chip. In other words, with RDNA 3, there is not only MCM design, but also the possibility of using stacking technology in new generation chips.

We mentioned that the red team can use the 3D V-Cache technique in Zen cores other than the cache. It looks like AMD’s future 3D stacking solution will find its way into many areas, providing performance boosts on a variety of hardware, including Ryzen, EPYC, and Radeon.

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Michael Lewis


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